A PFC converter is necessary for many electronic equipments to meet harmonic regulations and standards. For low power applications, single stage PFC converter is a better choice considering cost and performance.
Typical single-stage PFC topologies with tight output voltage regulation were proposed in the paper by Redl, R.; Balogh, L.; Sokal, N. O., “A New Family of Single-Stage Isolated Power-Factor Correctors with Fast Regulation of the Output Voltage”, PESC '94, P1137-1144, vol. 2, June 1994. In those topologies, a PFC cell is integrated with a Direct Current/Direct Current (DC/DC) conversion cell, and both cells share active switches and controller, but suffer from high intermediate bus voltage and high current stresses.
Some methods to reduce the intermediate bus voltage were discussed in the paper by Qiao, Chongming' Smedley, K. M., “A Topology Survey of Single-Stage Power Factor Corrector with a Boost Type Input-Current-Shaper” APEC 2000, P460-467, Vol. 1, March 2000. Unfortunately, those methods brings high distortion to the line current waveform, resulting in reduced power factor.
One approach to limit intermediate bus voltage was proposed in the publication by Luo, et al., “Flyboost Power Factor Correction Cell and Its Applications in Single-Stage AC-DC Converters”, PSEC, 2002. By adding a secondary winding to the boost inductor, there was provided two discharging paths for boost inductor: to the intermediate storage capacitor or directly to the load. It means that some input power is directly transferred to the load without being processed by DC/DC conversion cell, referred as parallel power transfer in both the publications by: Jiang, Y.; Lee, F. C.; Hua, G.; Tang, W., “A Novel Single-Phase Power Factor Correction Scheme”, APEC '93, P287-292, March 1993; and Garcia, O.; Cobos, J. A.; Prieto, R.; Alou, P.; Uceda, J.; “Power Factor Correction: A Survey”, PESC '01, P8-13 vol. 1, June 2001.
These approaches limit the intermediate bus voltage with little influence on input current waveform, and allow the DC/DC conversion cell to operate in a continuous conduction mode (CCM) without high voltage punishment at light load conditions.
Various patents have been proposed in this area but fail to overcome all the problems of the prior art.
A search was also carried out with the following results:
U.S. Pat. No. 5,146,394 to Ishii, et al discloses the use of only one power transformer; U.S. Pat. No. 5,796,595 to Cross has two transformers that are not connected in series and is not for Power Factor Correction applications; U.S. Pat. No. 5,909,361 to Kim discloses the use of only one power transformer; U.S. Pat. No. 5,982,638 to Tang, et al discloses the use of only one power transformer; U.S. Pat. No. 6,005,782 to Jain, et al. discloses the use of only one transformer to deliver the energy to the output and is not for Power Factor Correction applications; U.S. Pat. No. 6,031,747 to Ilic, et al, has no transformer, does not work as a Power Factor Correction cell and is not for Power Factor Correction applications; U.S. Pat. No. 6,115,267 to Herbert wherein the transformer does not work in the Flyback mode and is and without an intermediate DC bus capacitor; U.S. Pat. No. 6,272,027 B1 to Fraidlin, et aI has only one transformer and no intermediate DC bus capacitor; U.S. Pat. No. 6,281,666 B1 to Tressler, et al which is not for Power Factor Correction applications and has no intermediate DC bus capacitor; and, U.S. Pat. No. 6,282,109 B1 to Fraidlin, et aI has no isolation, no Flyback transformer nor an intermediate DC bus capacitor.
Thus, the need exists for a lower cost, lower bus voltage DC/DC conversion cell that can operate in Continuous Conduction Mode (CCM).